Regviz

Freescale Semiconductor /MK80F25615 /DMA /EARS

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Interpret as EARS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)EDREQ_0 0 (0)EDREQ_1 0 (0)EDREQ_2 0 (0)EDREQ_3 0 (0)EDREQ_4 0 (0)EDREQ_5 0 (0)EDREQ_6 0 (0)EDREQ_7 0 (0)EDREQ_8 0 (0)EDREQ_9 0 (0)EDREQ_10 0 (0)EDREQ_11 0 (0)EDREQ_12 0 (0)EDREQ_13 0 (0)EDREQ_14 0 (0)EDREQ_15 0 (0)EDREQ_16 0 (0)EDREQ_17 0 (0)EDREQ_18 0 (0)EDREQ_19 0 (0)EDREQ_20 0 (0)EDREQ_21 0 (0)EDREQ_22 0 (0)EDREQ_23 0 (0)EDREQ_24 0 (0)EDREQ_25 0 (0)EDREQ_26 0 (0)EDREQ_27 0 (0)EDREQ_28 0 (0)EDREQ_29 0 (0)EDREQ_30 0 (0)EDREQ_31

EDREQ_23=0, EDREQ_25=0, EDREQ_9=0, EDREQ_13=0, EDREQ_28=0, EDREQ_4=0, EDREQ_2=0, EDREQ_0=0, EDREQ_22=0, EDREQ_31=0, EDREQ_24=0, EDREQ_29=0, EDREQ_15=0, EDREQ_8=0, EDREQ_5=0, EDREQ_16=0, EDREQ_30=0, EDREQ_7=0, EDREQ_3=0, EDREQ_1=0, EDREQ_14=0, EDREQ_17=0, EDREQ_19=0, EDREQ_27=0, EDREQ_6=0, EDREQ_12=0, EDREQ_20=0, EDREQ_21=0, EDREQ_11=0, EDREQ_10=0, EDREQ_26=0, EDREQ_18=0

Description

Enable Asynchronous Request in Stop Register

Fields

EDREQ_0

Enable asynchronous DMA request in stop mode for channel 0.

0 (0): Disable asynchronous DMA request for channel 0.

1 (1): Enable asynchronous DMA request for channel 0.
EDREQ_1

Enable asynchronous DMA request in stop mode for channel 1.

0 (0): Disable asynchronous DMA request for channel 1

1 (1): Enable asynchronous DMA request for channel 1.
EDREQ_2

Enable asynchronous DMA request in stop mode for channel 2.

0 (0): Disable asynchronous DMA request for channel 2.

1 (1): Enable asynchronous DMA request for channel 2.
EDREQ_3

Enable asynchronous DMA request in stop mode for channel 3.

0 (0): Disable asynchronous DMA request for channel 3.

1 (1): Enable asynchronous DMA request for channel 3.
EDREQ_4

Enable asynchronous DMA request in stop mode for channel 4

0 (0): Disable asynchronous DMA request for channel 4.

1 (1): Enable asynchronous DMA request for channel 4.
EDREQ_5

Enable asynchronous DMA request in stop mode for channel 5

0 (0): Disable asynchronous DMA request for channel 5.

1 (1): Enable asynchronous DMA request for channel 5.
EDREQ_6

Enable asynchronous DMA request in stop mode for channel 6

0 (0): Disable asynchronous DMA request for channel 6.

1 (1): Enable asynchronous DMA request for channel 6.
EDREQ_7

Enable asynchronous DMA request in stop mode for channel 7

0 (0): Disable asynchronous DMA request for channel 7.

1 (1): Enable asynchronous DMA request for channel 7.
EDREQ_8

Enable asynchronous DMA request in stop mode for channel 8

0 (0): Disable asynchronous DMA request for channel 8.

1 (1): Enable asynchronous DMA request for channel 8.
EDREQ_9

Enable asynchronous DMA request in stop mode for channel 9

0 (0): Disable asynchronous DMA request for channel 9.

1 (1): Enable asynchronous DMA request for channel 9.
EDREQ_10

Enable asynchronous DMA request in stop mode for channel 10

0 (0): Disable asynchronous DMA request for channel 10.

1 (1): Enable asynchronous DMA request for channel 10.
EDREQ_11

Enable asynchronous DMA request in stop mode for channel 11

0 (0): Disable asynchronous DMA request for channel 11.

1 (1): Enable asynchronous DMA request for channel 11.
EDREQ_12

Enable asynchronous DMA request in stop mode for channel 12

0 (0): Disable asynchronous DMA request for channel 12.

1 (1): Enable asynchronous DMA request for channel 12.
EDREQ_13

Enable asynchronous DMA request in stop mode for channel 13

0 (0): Disable asynchronous DMA request for channel 13.

1 (1): Enable asynchronous DMA request for channel 13.
EDREQ_14

Enable asynchronous DMA request in stop mode for channel 14

0 (0): Disable asynchronous DMA request for channel 14.

1 (1): Enable asynchronous DMA request for channel 14.
EDREQ_15

Enable asynchronous DMA request in stop mode for channel 15

0 (0): Disable asynchronous DMA request for channel 15.

1 (1): Enable asynchronous DMA request for channel 15.
EDREQ_16

Enable asynchronous DMA request in stop mode for channel 16

0 (0): Disable asynchronous DMA request for channel 16

1 (1): Enable asynchronous DMA request for channel 16
EDREQ_17

Enable asynchronous DMA request in stop mode for channel 17

0 (0): Disable asynchronous DMA request for channel 17

1 (1): Enable asynchronous DMA request for channel 17
EDREQ_18

Enable asynchronous DMA request in stop mode for channel 18

0 (0): Disable asynchronous DMA request for channel 18

1 (1): Enable asynchronous DMA request for channel 18
EDREQ_19

Enable asynchronous DMA request in stop mode for channel 19

0 (0): Disable asynchronous DMA request for channel 19

1 (1): Enable asynchronous DMA request for channel 19
EDREQ_20

Enable asynchronous DMA request in stop mode for channel 20

0 (0): Disable asynchronous DMA request for channel 20

1 (1): Enable asynchronous DMA request for channel 20
EDREQ_21

Enable asynchronous DMA request in stop mode for channel 21

0 (0): Disable asynchronous DMA request for channel 21

1 (1): Enable asynchronous DMA request for channel 21
EDREQ_22

Enable asynchronous DMA request in stop mode for channel 22

0 (0): Disable asynchronous DMA request for channel 22

1 (1): Enable asynchronous DMA request for channel 22
EDREQ_23

Enable asynchronous DMA request in stop mode for channel 23

0 (0): Disable asynchronous DMA request for channel 23

1 (1): Enable asynchronous DMA request for channel 23
EDREQ_24

Enable asynchronous DMA request in stop mode for channel 24

0 (0): Disable asynchronous DMA request for channel 24

1 (1): Enable asynchronous DMA request for channel 24
EDREQ_25

Enable asynchronous DMA request in stop mode for channel 25

0 (0): Disable asynchronous DMA request for channel 25

1 (1): Enable asynchronous DMA request for channel 25
EDREQ_26

Enable asynchronous DMA request in stop mode for channel 26

0 (0): Disable asynchronous DMA request for channel 26

1 (1): Enable asynchronous DMA request for channel 26
EDREQ_27

Enable asynchronous DMA request in stop mode for channel 27

0 (0): Disable asynchronous DMA request for channel 27

1 (1): Enable asynchronous DMA request for channel 27
EDREQ_28

Enable asynchronous DMA request in stop mode for channel 28

0 (0): Disable asynchronous DMA request for channel 28

1 (1): Enable asynchronous DMA request for channel 28
EDREQ_29

Enable asynchronous DMA request in stop mode for channel 29

0 (0): Disable asynchronous DMA request for channel 29

1 (1): Enable asynchronous DMA request for channel 29
EDREQ_30

Enable asynchronous DMA request in stop mode for channel 30

0 (0): Disable asynchronous DMA request for channel 30

1 (1): Enable asynchronous DMA request for channel 30
EDREQ_31

Enable asynchronous DMA request in stop mode for channel 31

0 (0): Disable asynchronous DMA request for channel 31

1 (1): Enable asynchronous DMA request for channel 31

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data